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This letter demonstrates a successful method for on-state resistance reduction up to 20% by shallow trench isolation (STI) fingers and with extra NLDD implant in the fingered region simultaneously for medium power devices. This fingered region provides a multidimensional electric field that avoids MOSFET breakdown voltage decrease, and it also shortens the drain-current conduction path. Therefore, low on-state resistance and high drain driving current is obtained in our proposed device. Careful design for structural parameters of this STI finger is needed to achieve the optimum R ON performance without hurting breakdown voltage.