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Implementation of an optimal parallel algorithm for arithmetic expression parsing

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1 Author(s)
Suresh, H. ; Fac. of Sci. & Technol., Griffith Univ., Brisbane, Qld., Australia

Development of efficient algorithms for parallel computer architectures is an on-going research area and in the recent past a great volume of theoretical work has been carried out for the search of suitable algorithms in concurrent processing environment. In this paper, the results obtained in the implementation of an Optimal Parallel Algorithm developed by Deng and Iyengar (1992) in the esoteric area of arithmetic expression parsing is reported. The `C' code developed and tested on an IBM Compatible Personal Computer in this investigative study, is a simple recursive descent parser and may be used for parallel parsing of arithmetic expressions. The algorithm was developed to suit the SIMD parallel architecture to avoid any communication bottlenecks posed by PVM system, however, design and structure of the code readily permits portability to a parallel computer system

Published in:

Algorithms and Architectures for Parallel Processing, 1995. ICAPP 95. IEEE First ICA/sup 3/PP., IEEE First International Conference on  (Volume:2 )

Date of Conference:

19-21 Apr 1995