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The Realization of SAR Real-Time Signal Processor by FPGA

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2 Author(s)
Zhi-Jian Sun ; Coll. of Sci., Qingdao Technol. Univ., Qingdao ; Xue-Mei Liu

The computation amount of SAR radar image is huge. To reach real-time speed, we need high-function device. The computation task of SAR concentrates on range and azimuth compressions. Usual measure of compression is using high speed DSP, but FPGA technique is improving so fast that it has become a better way to realize compression than DSP. DSP often needs external interface and control chips to work together while one FPGA chip accomplishes almost the whole work, the circuit will become more simple and steady. In this paper, combined our real work, introduces the design and realization of SAR real-time processing system by STRATIX ALTERA Co.

Published in:

Computer Science and Software Engineering, 2008 International Conference on  (Volume:4 )

Date of Conference:

12-14 Dec. 2008