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Vertical metal-oxide-semiconductor field-effect transistors (UMOSFETs) were built on silicon substrates thinned to 7 mum and plated with 50- mum copper as drain electrode and mechanical support. Compared to the same devices on silicon substrates of 200 mum thick, the UMOSFET on 7-mum silicon demonstrates at least 16% less channel resistance and two times better device ruggedness. The reduced resistance is due to enhanced carrier mobility caused by increasing biaxial compressive thermal stress in silicon perpendicular to the channel, which is confirmed by a 3-D piezoresistance model. The doubling of ruggedness is attributed to a much improved transient thermal conductance.