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A floating communication processor architecture in a distributed real-time system

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2 Author(s)
Shin, K.G. ; Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA ; Muthuswamy, Y.

The issues involved in providing hardware communication support at each mode in a distributed real-time system are studied. First, a general architecture for each node of the system is described. An algorithm for message handling by dedicated hardware called a communication processor (CP) is proposed, to maximize the number of requests handled over the various constraints. A floating CP architecture is proposed, to maximize the number of requests handled under the various constraints. A floating CP architecture is proposed to maximize the utilization of the processors at a node and provide greater fault-tolerance in the system

Published in:

System Sciences, 1989. Vol.I: Architecture Track, Proceedings of the Twenty-Second Annual Hawaii International Conference on  (Volume:1 )

Date of Conference:

3-6 Jan 1989