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A conditional resource sharing method for behavioral synthesis of highly testable data paths

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3 Author(s)
Lee, T.C. ; Dept. of Electr. Eng., Princeton Univ., NJ, USA ; Jha, N.K. ; Wolf, W.H.

Existing conditional resource sharing methods using in behavioral synthesis focus on area and performance optimization and do not consider testability. This paper extends our previous work to handle conditional branches. A hierarchical control-data flow graph (HCDFG) is used to model the system behavior. A postorder traversal of the HCDFG is employed to reduce sequential depths and loops for testability synthesis. Experimental results for the benchmarks show that our method, with no a priori test strategy assumption, can achieve higher fault coverage in shorter test generation time than an algorithm which disregards testability, and, with partial scan test assumption, can have high testability with fewer scan registers than some design-for-test methods

Published in:

Test Conference, 1993. Proceedings., International

Date of Conference:

17-21 Oct 1993