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An ASIC design for real-time image processing in industrial applications

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5 Author(s)
Valle, M. ; Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy ; Nateri, G. ; Caviglia, D.D. ; Bisio, G.M.
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In this paper we present the design of an ASIC chip for real-time image processing in industrial applications. The chip is a module of a system for the automatic surface inspection of mechanical parts: it implements the feed-forward phase of a neural network model (multi-layer perceptron with local connections) tuned to the specific application. The design has been performed in 0.7 μm CMOS technology using an approach based on high level transformations of the VHDL specifications. Special emphasis was given to achieve real-time speed. As a result, the architecture is based on a deep pipeline and the performance is beyond the real-time specifications

Published in:

European Design and Test Conference, 1995. ED&TC 1995, Proceedings.

Date of Conference:

6-9 Mar 1995