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Implementation of spaceborne SAR imaging processor based on FPGA

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2 Author(s)
Xie Yizhuang ; Radar Res. Lab., Beijing Inst. of Technol., Beijing ; Long Teng

With the rapid development of FPGA and its technology characteristic, this paper puts forward that FPGA is an effective and realizable technical approach for future spaceborne SAR imaging processor. With the ready-researched FPGA processor, the implementation architecture of spaceborne SAR imaging processor is studied. Further more, R-D quick look algorithm of spaceborne SAR is analyzed and mapped to the FPGA processor, each processing node of the FPGA processor uses different implementation architectures to image with the spaceborne SAR simulation raw data under the way of pipeline processing.

Published in:

Signal Processing, 2008. ICSP 2008. 9th International Conference on

Date of Conference:

26-29 Oct. 2008