An improved method on the performance of hybrid filter banks of ADC due to realization errors

This paper studies the error of the hybrid filter banks (HFB) due to analog realization errors. It is shown that the architecture of HFB is much more sensitive to even small analog imperfections. Therefore, the performance of HFB has a dramatic deterioration. In order to improve the performance, a method named central frequency is presented. The results show that the value of max aliasing function the main restricting source of resolution in HFB ADC (analog-to-digital converter) decreases about 50 dB. And the SNR (signal-to-noise ratio) of the whole system is enhanced above 30 dB.