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A very important class of bugs that occurs in VLSI projects, and especially in System on Chip (SoC) type projects, are bugs caused by two or more processes on chip trying to access a shared resource simultaneously. These kinds of bugs are both hard to find and very likely have the potential to cause a respin if not found since it is very hard to work around them in software (SW). In this paper we present a framework to define such conflict cases and a tool for automatically generating test cases from this definition. We have implemented this framework and tool, generated test suites, and simulated them on the Design Under Verification. Our method immediately proved its effectiveness by catching an unknown problem in a project which has already established a reasonable test suite regression that is simulated periodically.