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A 9 mW Highly-Digitized 802.15.4 Receiver Using Bandpass \Sigma \Delta ADC and IF Level Detection

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4 Author(s)
Yong-Il Kwon ; Samsung Electro-Mech., Suwon ; Park, T.J. ; Koon-Shik Cho ; Hai-Young Lee

A low power (9 mW) highly-digitized 2.4 GHz receiver for sensor network applications (IEEE 802.15.4 LR-WPAN) is realized by a 0.18 mum CMOS process. We adopted a novel receiver architecture adding an intermediate frequency (IF) level detection scheme to a low-power complex fifth-order continuous-time (CT) bandpass SigmaDelta modulator in order to digitalize the receiver. By the continuous-time bandpass architecture, the proposed SigmaDelta modulator requires no additional anti-aliasing filter in front of the modulator. Using the IF detector, the achieved dynamic range (DR) of the overall system is 95 dB at a sampling rate of 64 MHz. This modulator has a bandwidth of 2 MHz centered at 2 MHz. The power consumption of this receiver is 9.0 mW with a 1.8 V power supply.

Published in:

Microwave and Wireless Components Letters, IEEE  (Volume:18 ,  Issue: 12 )

Date of Publication:

Dec. 2008

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