We are currently experiencing intermittent issues impacting performance. We apologize for the inconvenience.
By Topic

A Multi-Aperture Image Sensor With 0.7 \mu{\hbox {m}} Pixels in 0.11 \mu{\hbox {m}} CMOS Technology

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)

The first integrated multi-aperture image sensor is reported. It comprises a 166 \times 76 array of 16 \times 16, 0.7 \mu{\hbox {m}} pixel, FT-CCD subarrays with local readout circuit, per-column 10-bit ADCs, and control circuits. The image sensor is fabricated in a 0.11 \mu{\hbox {m}} CMOS process modified for buried channel charge transfer. Global snap shot image acquisition with CDS is performed at up to 15 fps with 0.15 V/lux-s responsivity, 3500 e- well capacity, 5 e- read noise, 33 e-/s dark signal, 57 dB dynamic range, and 35 dB peak SNR. When coupled with local optics, the multi-aperture image sensor captures overlapping views of the scene, which can be postprocessed to obtain both a high-resolution 2-D image and a depth map. Other benefits include the ability to image objects at close proximity to the sensor without the need for objective optics, achieve nearly complete color separation through a per-aperture color filter array, relax the requirements on the camera objective optics, and increase the tolerance to defective pixels. The multi-aperture architecture is also highly scalable, making it possible to increase pixel counts well beyond current levels.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:43 ,  Issue: 12 )