An adaptive 4-tap analog FIR equalizer for 10-Gb/s over backplane serial link receiver

An adaptive 4-tap transverse-form differential analog finite impulse response (AFIR) filter in 65-nm CMOS is described in this paper. The filter is used for receiver-side equalization of severe inter-symbol interference (ISI) encountered in 10-Gb/s serial-link over legacy backplanes in 10GBASE-KR mode of the IEEE802.3ap standard [1] and over passive direct-attach SFP+ cables [2]. The AFIR is accompanied by an integrated in-die digital adaptation engine, employing the zero-forcing (ZF) equalization with the sign-sign block least mean square (LMS) adaptation algorithm. The AFIR uses an LC delay line structure which was optimized for low area and enhanced frequency behavior. The design has been fabricated as part of the receiver in a fully functional 10GBASE-KR compliant chip, achieving bit-error rate lower than 10-12 over several different backplane channels. It consumes 7.9 mW from a 1.2-V supply and occupies an area of 0.26 mm².