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Parameterized transient thermal behavioral modeling for chip multiprocessors

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4 Author(s)
Duo Li ; Dept. of Electr. Eng., Univ. of California, Riverside, CA ; Tan, S.X.-D. ; Pacheco, E.H. ; Tirumala, M.

In this paper, we propose a new architecture-level parameterized transient thermal behavioral modeling algorithm for emerging thermal related design and optimization problems for high-performance chip-multiprocessor (CMP) design. We propose a new approach, called ParThermPOF, to build the parameterized thermal performance models from the given architecture thermal and power information. The new method can include a number of parameters such as the locations of thermal sensors in a heat sink, different components (heat sink, heat spread, core, cache, etc.), thermal conductivity of heat sink materials, etc. The method consists of two steps: first, response surface method based on low-order polynomials is applied to build the parameterized models at each time point for all the given sampling nodes in the parameter space. Second, an improved generalized pencil-of-function (GPOF) method is employed to build the transfer-function based behavioral models for each time-varying coefficient of the polynomials generated in the first step. Experimental results on a practical quad-core microprocessor show that the generated parameterized thermal model matchs the given data very well. ParThermPOF is very suitable for design space exploration and optimization where both time and system parameters need to be considered.

Published in:

Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on

Date of Conference:

10-13 Nov. 2008