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Boolean factoring and decomposition of logic networks

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3 Author(s)
Mishchenko, A. ; Dept. of EECS, Univ. of California, Berkeley, CA ; Brayton, R. ; Chatterjee, S.

This paper presents new methods for restructuring logic networks based on fast Boolean techniques. The basis for these are 1) a cut-based view of a logic network, 2) exploiting the uniqueness and speed of disjoint-support decompositions, 3) a new heuristic for speeding these up, 4) extending these to general decompositions, and 5) limiting local transformations to functions with 16 or less inputs so that fast truth table manipulations can be used in all operations. Boolean methods lessen the structural bias of algebraic methods, while still allowing for high speed and multiple iterations. Experimental results on K-LUT networks show an average additional reduction of 5.4% in LUT count, while preserving delay, compared to heavily optimized versions of the same networks.

Published in:

Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on

Date of Conference:

10-13 Nov. 2008