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Design of Digital Intermediate Frequency DSSS System Based on Software Define Radio

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3 Author(s)
Wenmiao Song ; Dept. of Electr. & Commun., North China Electr. Power Univ., Baoding ; Baogang Li ; Li Yongqian

A full digital intermediate frequency (IF) differential BPSK direct sequence spread spectrum receiver platform is introduced. In the receiver the FPGA chip based hardware design is adopted and digital signal processing algorithm is combined to realize signal acquisition, tracking and demodulation. A scheme of a parallel combined serial acquisition is applied, and the Tong decision algorithm is also applied in the receiver. The DDLL and the DPLL are used in order to track the PN phase and the carrier phase of received spread spectrum signals separately. The design is optimized to achieve less hardware complexity and finally implemented on Altera APEX FPGA EP20k using Verilog language and TMS320C5416. The architecture can be used in oversea mobile communication system.

Published in:

Wireless Communications, Networking and Mobile Computing, 2008. WiCOM '08. 4th International Conference on

Date of Conference:

12-14 Oct. 2008