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Arithmetic unit design for neural accelerators: cost performance issues

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2 Author(s)
Sammut, K.M. ; Dept. of Electron. & Electr. Eng., Loughborough Univ. of Technol., UK ; Jones, S.R.

Arithmetic unit design is a key issue when supporting the computational requirements of neural networks. However, there is little quantitative evidence from the study of existing neural accelerators to help choose between arithmetic constructs. This paper presents an assessment of the cost-performance trade-offs between arithmetic constructs for linear neural accelerators

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Computers, IEEE Transactions on  (Volume:44 ,  Issue: 10 )