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Ag–Copper Structure for Bonding Large Semiconductor Chips

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3 Author(s)
Jong Sung Kim ; Electr. Eng. & Comput. Sci., California Univ., Irvine, CA ; Wang, P.J. ; Lee, C.C.

Ag-copper dual-layer substrate design is presented. The Ag cladding on the copper substrate is a buffer to deal with the large mismatch in coefficient of thermal expansion (CTE) between semiconductors such as Si (3 ppm/degC) and Cu (17 ppm/deg C). Ag is chosen because of its low yield strength, only one-tenth of that of Cu and one-third of the popular Sn3.5Ag solder. Other advantages are high electrical conductivity and high thermal conductivity. To bond Si chips to the Ag layer on copper substrates, Sn-rich solder is used. A fluxless bonding process is designed and developed. The bonding media are Ni/Sn/Au multilayer solder structure plated over Ag. In this design, Ni is a diffusion barrier between Sn and Ag. The thin (100 nm) outer Au layer prevents inner Sn from oxidation. The Si chip is deposited with Cr/Au under bump metallurgy (UBM). The bonding process is performed in 50-mtorr vacuum atmosphere without any flux. Comparing to bonding in air, the oxygen content is reduced by a factor of 15 200. The resulting joints consist of three distinct layers, i.e., Sn-rich layer, Ni3 Sn4 intermetallic compound, and Ni. Scanning acoustic microscopy (SAM) is used to verify the quality of the joint. Microstructure and composition of the joints are studied using scanning electron microscopy (SEM) with energy dispersive X-ray spectroscopy (EDX). This technique presents an initial success in overcoming the very large mismatch in thermal expansion between silicon and copper. It can be applied to mounting numerous high-power silicon devices to Cu substrate for various applications such as hybrid automotive and high-voltage power networks.

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Components and Packaging Technologies, IEEE Transactions on  (Volume:31 ,  Issue: 4 )