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In this paper the design and measurement of a high-speed optical receiver, completely integrated in a standard 130 nm CMOS technology, is described. The low optical bandwidth of the integrated photodiode has been alleviated with a differential photodiode topology and an optimized equalizer. The photodiode has a large parasitic capacitance of 1 pF at each of its outputs and a responsivity of 3.4 mA/W. A TIA with a high ZBW of 75.3 THz enables fast operation which is verified by measurements. For a modulated optical input power of -3 dBm, measurements show that bitrates up to 2.4 Gbit/s and 2.7 Gbit/s can be received for a BER of 1.5 middot 10-12 and 1.85 middot 10-9 respectively. The current consumption of the complete receiver is 187 mA for a supply voltage of 1.2 V.