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A 3D graphics processor with fast 4D vector inner product units and power aware texture cache

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4 Author(s)
Jae-Sung Yoon ; Dept. of EECS, KAIST, Daejeon ; Lee-Sup Kim ; Chang-Hyo Yu ; Lee-Sup Kim

A 3D graphics system integrating two symmetric unified shader cores for mobile application is presented. To utilize instruction, data, and task level parallelism, a dual-core, dual-issue VLIW and multi-threading method is adopted. For efficient processing, an IEEE-754 compliant fast 4D vector inner product arithmetic unit for matrix multiplication, an internal bus system and a configurable texture cache technique to reduce power consumption in texture unit are proposed. By these methods, the proposed processor achieves 143 Mvertices/s and 2.3 Gtexels/s consuming the power of 367 mW. Also, 45% performance improvement and 26% increase in performance per power ratio are achieved.

Published in:

Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE

Date of Conference:

21-24 Sept. 2008