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This paper illustrates the application of a novel theory, namely, the distributional robustness theory (DRT), to compute the worst-case timing yield of a circuit. The assumption is that the probability distributions of the process variables are unknown, and only their intervals and their ldquoclassrdquo of distributions are available. This paper considers practical classes to describe potential distributions which match with partial statistical information that might be available. Some classes are suitable for independent distributions that have symmetrical or asymmetrical shapes, while others can account for correlations. These classes have high flexibility to include various shapes of the distributions of the process variations. At a higher level, they can also capture the case when uncertainty in their correlation coefficients exists. The contributions of this paper are on formulating the DRT for different cases of variations and in deriving conditions (e.g., acceptable bounds on timing constraint, acceptable intervals of variations) that allow applying the results of the DRT. Compared with other recent works, the presented approach can include correlations among process variations and does not require knowledge of the exact function form of their joint distribution function. The presented approach is also applicable to other types of parametric yield.
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on (Volume:27 , Issue: 12 )
Date of Publication: Dec. 2008