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Verification of Analog/Mixed-Signal Circuits Using Symbolic Methods

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5 Author(s)
Walter, D. ; Univ. of Northern Philippines, Vigan ; Little, S. ; Myers, C. ; Seegmiller, N.
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This paper presents two symbolic model checking algorithms for the verification of analog/mixed-signal circuits. The first model checker utilizes binary decision diagrams while the second is a bounded model checker that uses a satisfiability modulo theory solver. Both methods have been implemented, and preliminary results are promising.

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:27 ,  Issue: 12 )

Date of Publication:

Dec. 2008

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