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In this paper, we examine the digital hardware design and implementation of a novel compact block cipher, referred to as PUFFIN, that is suitable for embedded applications. An implementation of PUFFIN targeted to ASIC technology is considered. The proposed block cipher is designed to have a 64-bit block size, a 128-bit key, and is capable of both encryption and decryption operations. The cipher structure is based on the following features: a simple encryption process composed of permutations and substitutions based on 4 times 4 S-boxes, an identical datapath for both encryption and decryption facilitated by involutional operations, and a straightforward on-the-fly subkey generation composed of only a permutation and bit inversions. PUFFIN is found to perform well for implementations based on 0.18-micron CMOS technology. In comparison to other lightweight ciphers, PUFFIN has preferred features, low hardware complexity, and good throughput.