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This paper demonstrates a differential current-mode chaos-based circuit used to generate random number sequences, which was implemented on 90-nm CMOS-SOI technology. The proposed design is more suitable for circuit implementation of a chaotic map, and diminishes non-idealities such as asymmetry, offset and low slope values. The differential design also exhibits superior robustness to supply voltage, temperature, and process variations. Behavioral and SPICE simulations are used to show the advantages of the differential chaos circuit in comparison to a single ended version. Furthermore, to validate that the circuit can serve as a white noise generator, a statistical random number generator test, as suggested by the Federal Information Processing Standard (FIPS), was conducted on the simulation results and verified on the hardware. The results of the test demonstrated that the circuit functions with very high robustness.