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A fast, successful decoding detection mechanism is proposed for dual-diagonal block-based low-density parity-check (LDPC) codes. The algorithm eliminates unnecessary parity check computation by exploiting the structure of dual-diagonal LDPC codes. The average number of decoding iterations can be reduced for both two-phase decoders and layered decoders with no performance degradation on the AWGN channel. Simulation results show that the proposed mechanism reduces average iterations by 10-15- at 10-5 bit error rate compared with standard parity-check equations.
Date of Publication: November 6 2008