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A 4-element phased-array front-end receiver based on 4-bit RF phase shifters is designed for 36-46 GHz satellite communications. The phased-array uses a corporate-feed approach with integrated Wilkinson combiners for linear coherent power combining. The measured loss in the Wilkinson coupler is 0.5-0.6 dB at 30-50 GHz. The phased-array shows 10.4 dB of average power gain, les1.2 dB of RMS gain error, les8.7deg of RMS phase error and an IIP3 of -13.5 dBm per channel for all 4-bit phase states at 38.5 GHz. The chip consumes 118 mA from a 5 V supply voltage. The overall chip size is 1.4times1.7 mm2 and includes all the digital control circuits (address decoders, registers, etc.) for the array.