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Seeing double

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1 Author(s)

This paper discusses double patterning lithography for chips' manufacture. This technique was first demonstrated by Belgium's Interuniversity Microelectronics Centre (IMEC) for the 32-nm node, using a combination of double-patterning and immersion lithography. Conceptually, it's simple: instead of exposing the photoresist layer once under one photomask, as in conventional optical lithography, this technique exposes it twice.

Published in:

Spectrum, IEEE  (Volume:45 ,  Issue: 11 )