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Power and energy dissipation are increasingly important in SOC design. Low operating power reduces end-product costs by reducing the size of power supplies and heat sinks and by eliminating active cooling. Low SOC energy dissipation reduces battery size and increases battery life in portable equipment. As the use of multiple processors grows in SOC design, to gain the programmability and flexibility benefits that processors provide, the need to reduce each processor's power and energy requirements also grows. Configurable processors can deliver dramatic gains in energy efficiency, relative to fixed-instruction-set processors. This energy advantage comes from three improvements. First, instruction-set extension tailors a configurable processor to target applications, which reduces the required number of execution cycles, drops the processor's required operating frequency, and consequently cuts operating power. Second, processor configuration removes unneeded features and further reduces the processor's operating power. Third, automated processor-generation tools permit logic optimization, signal switching reductions, and use of low-voltage circuits and fabrication processes. Real processor-core designs can achieve power dissipation approaching 20 muW/MHz at 0.8V and nearly 10 muW/MHz at 0.6V, using production 0.13 mum libraries.