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One relevant problem in current SoC design is the mapping of modules on a network-on-chip (NoC) targeting low energy consumption. In order to solve this mapping problem, several models are available to capture computation and communication characteristics of applications. The main goal of this article is to propose and compare algorithms for obtaining low energy mappings onto NoCs using a communication-weighted model (CWM). These include from exhaustive search to stochastic search methods and heuristic approaches, plus pertinent combinations. Two new heuristics are proposed, called largest communication first (LCF) and greedy incremental (GI). In addition, it describes algorithms that provide specially designed combinations of LCF with simulated annealing and tabu search. The use of LCF and combined approaches compared with pure stochastic algorithms provides average reductions above 98% in execution time, while keeping energy saving within at most 5% of the best results. Besides, the use of the heuristic GI alone provides average reductions in execution time above 90%, when compared with pure stochastic algorithms, and obtains better energy saving results than LCF and combined approaches for large NoCs.