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Asynchronous microprocessors are more flexible to adapt to physical parameters, and have lower power consumption than synchronous microprocessors. In this paper we will introduce the design of an asynchronous microprocessor (V8-uRISC) and explore its design process compared to synchronous design. The processor is synthesized by Persia, an automatic tool for synthesizing asynchronous circuits. We have performed full functional test at various levels of design and synthesis. Our results show that an area overhead is expected for the asynchronous design as the cost for lower power and more robustness.