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A Flexible and efficient bit error rate simulation method for high-speed differential link analysis using time-domain interpolation and superposition

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3 Author(s)
Kai Xiao ; Intel Corp. USA, Santa Clara, CA ; Beomtaek Lee ; Xiaoning Ye

In this paper, a flexible and efficient time-domain method for calculating the bit error rate of high-speed differential links is presented. The method applies interpolation and superposition to the step response of a channel to construct the jittery data or/and clock waveforms at the receiver. With the statistics of the actual reference-crossing points extracted from the constructed receiver waveforms, the bathtub curves can be derived and extrapolated to get the eye margin at the given bit error rate. A software has been developed and applied for high-speed differential link design using the method. Good correlation has been achieved between the simulated results using this method and the measurement data with a bit error rate tester.

Published in:

Electromagnetic Compatibility, 2008. EMC 2008. IEEE International Symposium on

Date of Conference:

18-22 Aug. 2008

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