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FIDIAS: an integral approach to high-level synthesis

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6 Author(s)
Septien, J. ; Dept. de Inf. y Autom., Univ. Complutense de Madrid, Spain ; Mozos, D. ; Tirado, J.F. ; Hermida, R.
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An integral approach to the problem of high-level synthesis of digital architectures as implemented in the FIDIAS synthesis system is described. The synthesis task is split into different subtasks, the interrelation between them is no longer ignored as happens in most systems. One of the system's outstanding features is the control of global system behaviour performed by an expert system that deals with such interrelations and aims it towards the required goals. The most important subtasks are explained in detail. Among these subtasks, cycle-time estimation, operation scheduling, allocation search algorithm and area estimation are found. Heuristics for intelligent bounding of the design space during allocation are shown. Also presented is one of the most novel features of FIDIAS, which is the use of heuristics to guide the search performed by the allocation algorithm through the accessible design space

Published in:

Circuits, Devices and Systems, IEE Proceedings -  (Volume:142 ,  Issue: 4 )