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Advanced low-cost bare-die packaging technology for liquid crystal displays

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1 Author(s)
Hwang, J.C. ; Microelectron. & Comput. Technol. Corp., Austin, TX, USA

The evolution of LCD-driver packaging technology is driven by four main requirements: finer pixel pitch, smaller module area, thinner panels, and lower costs. COG bonding systems under development for fine-pitch, high-density bonding offer pitches of 80 μm or less and fewer connection points, thereby increasing image-element counts and enabling small pixels necessary for full-color LCD displays. In response to such new bonding requirements, advances in the bonding field have led to new systems, in place of packaging systems using conventional quad flat packs (QFP). Tape-automated bonding (TAB), which is highly suitable for mounting thin packages with large numbers of pins, has gained attention as an LSI packaging technology for high pin-count and fine-pitch mounting for years, especially in the assembly of mid- to large-size LCD panels. The major advantage of TAB is testing and burning-in drivers prior to final assembly. However, TAB reaches a barrier when the outer lead pad pitch drops below 100 μm. At this point, chip-on-glass (COG) technology becomes not only a viable solution, but one of the only solutions to the problem of fine pitch interconnect. In addition to providing display driver connection, COG technology provides a solution for other applications in which conventional bonding technologies such as wire bonding and TAB may have limitations. One countermeasure under investigation is greater miniaturization of IC packages. At present, however, the most effective method is to remove IC chips from packages for direct mounting on the substrate. Thus, the trend toward using bare-die bonding onto substrates has steadily increased. More specifically, bare-die bonding is introduced to achieve the following objectives: (1) further surface mount technology (SMT) miniaturization and increased density, and (2) packaging that takes advantage of the characteristics of LSI elements designed for increased speed and performance

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Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on  (Volume:18 ,  Issue: 3 )