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Slot clock recovery in optical PPM communication systems with avalanche photodiode photodetectors

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2 Author(s)
Davidson, F.M. ; Dept. of Electr. & Comput. Eng., John Hopkins Univ., Baltimore, MD, USA ; Xiaoli Sun

Slot timing recovery in a direct-detection optical PPM communication system can be achieved by processing the photodetector output waveform with a nonlinear device whose output forms the input to a phase-locked loop. The choice of a simple transition detector as the nonlinearity is shown to give satisfactory synchronization performance. The RMS phase error of the recovered slot clock and the effect of slot timing jitter on the bit error probability were directly measured. The experimental system consisted of an AlGaAs laser diode (λ=834 nm) and a silicon avalanche photodiode photodetector. The system used Q =4 PPM signaling and operated at a source data rate of 25 Mb/s. The mathematical model developed to compute the RMS phase error of the recovered clock is shown to be in good agreement with results of actual measurements of phase errors. The use of the recovered slot clock in the receiver resulted in no significant degradation in receiver sensitivity compared to a system with perfect slot timing. The system achieved a bit error probability of 10-6 at a received optical signal energy of 55 detected photons per information bit

Published in:

Communications, IEEE Transactions on  (Volume:37 ,  Issue: 11 )

Date of Publication:

Nov 1989

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