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Verification of Pin-Accurate Port Connections

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4 Author(s)
Geeng-Wei Lee ; National Chiao Tung University ; Juinn-Dar Huang ; Chun-Yao Wang ; Jing-Yang Jou

Before verifying the functionality of SoCs, designers must ensure the correctness of the pin-accurate interfaces of up to hundreds of integrated IP blocks. This article presents a new connection model and a corresponding error model for pin-accurate port connections, along with an algorithm for generating the minimum pattern set, a methodology for diagnosing errors, and a port connection verification flow.

Published in:

IEEE Design & Test of Computers  (Volume:25 ,  Issue: 5 )