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We propose a new fault-tolerant memory structure derived from the duplex configuration. In this new structure the memory is split into two elements, and a third element, with the same capacity as each of the others, is added. The third element stores coded information obtained from the information in the other two. Two different implementations, parallel and series, have been developed, and are studied in some detail. A study of the reliability improvement and probability of error for this new fault-tolerant memory structure is included.
Computers and Digital Techniques, IEE Proceedings E (Volume:128 , Issue: 1 )
Date of Publication: January 1981