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A parallel image processor (PIP) consisting of eight Texas Instruments TMS32010 digital signal processors is described. The architecture is designed for image-processing applications and two common pattern-recognition algorithms, i.e. edge detection followed by thinning are implemented achieving a total processing time of less than one second for a 256 Ã 256 pixel image. The advantages and limitations of using the TMS32010 as a fast signal processor are described. Problems encountered in programming the parallel processors and ways to overcome them are highlighted.
Computers and Digital Techniques, IEE Proceedings E (Volume:134 , Issue: 2 )
Date of Publication: March 1987