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Cascadable NMOS VLSI circuit for implementing a fast convolver using the fermat number transform

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3 Author(s)
Towers, P.J. ; University of Newcastle upon Tyne, Department of Electrical & Electronic Engineering, The Merz Laboratories, Newcastle upon Tyne, UK ; Pajayakrit, A. ; Holt, A.G.J.

The paper describes a novel NMOS VLSI circuit, a set of which can be cascaded to form a 32-point Fermat number transformer/ inverse transformer operating over F4(224+ 1 = 216+ 1 = 65537). With the addition of a modulo F4multiplier a fast convolver/correlator can be constructed, allowing the favourable properties of the transform to be exploited avoiding the difficulties of implementing 17-bit arithmetic with a standard micro- or signal processor. The design comprises one complete section of a pipelined transformer, and is novel in that it may be programmed to function at any point in a forward or inverse pipeline, so allowing the construction of a pipelined convolver or correlator using identical chips. This overcomes the difficulty of fitting a complete pipeline on to one chip without resorting to the use of several different designs.

Published in:

Electronic Circuits and Systems, IEE Proceedings G  (Volume:134 ,  Issue: 2 )