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Systolic implementations for deconvolution, DFT and FFT

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5 Author(s)
T. Willey ; Hewlett-Packard Limited, Research & Development Department, South Queensferry, UK ; R. Chapman ; H. Yoho ; T. S. Durrani
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The paper presents a number of systolic configurations for computing deconvolutions and discrete Fourier transformations. Two approaches to deconvolution are considered: a time-domain approach, which is based on a systolic inversion of an associated Toeplitz matrix, generated by a wavefront propagation of the known system response, while the other approach, which is in the frequency domain, utilises systolic discrete Fourier transform (DFT) and fast Fourier transform (FFT) processors. The latter employs a systolic elevator concept, which circumvents the traditional need for global communications in the FFT. Aspects of hardware implementation and speed trade-offs are also discussed.

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Communications, Radar and Signal Processing, IEE Proceedings F  (Volume:132 ,  Issue: 6 )