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High-speed single-board flexible hardware implementation of a wave digital filter

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2 Author(s)
S. S. Lawson ; Syracuse University, Department of Electrical & Computer Engineering, Syracuse, USA ; S. Terplan

The hardware implementation of a sixth-order wave digital filter on a single printed-circuit board has been described in the literature. In the present paper, a greatly improved hardware design is discussed. By including more parallelism into the architecture, sampling rates of over 500 kHz can be achieved for a fifthorder filter. With the aid of a microprocessor development system, the filter can be programmed for any order up to 15. Once programmed, the filter runs independently. An example is given, which illustrates the hardware performance with various coefficient wordlengths. Attention is also paid to the question of in-band noise.

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IEE Proceedings G - Electronic Circuits and Systems  (Volume:131 ,  Issue: 1 )