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Realisation of logic functions by multi-output threshold-logic gates

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1 Author(s)
Bennett, L.A.M. ; University College of Swansea, Department of Electrical & Electronic Engineering, Swansea, UK

Two different multi-output threshold-logic gate structures are considered and their information requirements compared. A method, based on a trial and error algorithm, is described which may be used to realise a logic function by each of these structures. The method is quite general and has been tested on a large number of functions. Some preliminary observations from these tests are presented.

Published in:

Computers and Digital Techniques, IEE Proceedings E  (Volume:129 ,  Issue: 6 )

Date of Publication:

November 1982

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