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Fault detection and correction in array computers for image processing

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1 Author(s)
Moore, W.R. ; General Electric Company plc, Hirst Research Centre, Wembley, UK

The paper addresses the problems of detecting and correcting faults that may occur in arrays of processors used for image processing. The variety of useful hardware and software solutions is reviewed. It is shown that faults can be corrected efficiently by bypassing the faulty column of the array, and a novel technique is described which detects processor faults with a very modest increase in circuitry. The addition of a parity check on the memory is sufficient to give an effective and efficient detection and correction of all permanent and many transient faults. Additionally, the use of a full parity processor increases the proportion of transient faults detected.

Published in:

Computers and Digital Techniques, IEE Proceedings E  (Volume:129 ,  Issue: 6 )

Date of Publication:

November 1982

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