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Speed-optimised microprocessor implementation of a digital filter

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2 Author(s)
B. S. Tan ; Imperial College of Science and Technology, Department of Electrical Engineering, London, UK ; G. J. Hawkins

A practical, efficient scheme is described for the implementation of a real-time programmable digital filter using a microprocessor. The use of distributed arithmetic is known to be able to provide increased speeds by avoiding time-consuming multiplications. To achieve maximum speeds, the working program in a microprocessor implementation should, as far as possible, contain only those instructions which perform the arithmetic functions. High component efficiency is also achieved if the inherent control capabilities of the microprocessor are fully utilised, in particular where support hardware elements are used. Simple techniques are proposed for meeting the above objectives, which are inexpensive to implement and are readily adaptable for most standard microprocessors. The low cost and enhanced speed of implementation makes it attractive as an economical alternative to hard-wired digital filters for working frequencies in the audio and telephony range of frequencies and as a building block for cascade realisation of larger length filters, particularly of the FIR type. Some results of an experimental model using the commercial standard 8080A micropressor are given and comparisons with implementations for other micropressors are made.

Published in:

IEE Proceedings E - Computers and Digital Techniques  (Volume:128 ,  Issue: 3 )