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High-voltage device termination techniques a comparative review

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1 Author(s)
B. Jayant Baliga ; General Electric Company, Corporate Research & Development Center, Schenectady, USA

High-voltage power device performance is often limited by the ability to approach nearly ideal behaviour at the edges of the chip. Consequently, a large number of termination techniques have been explored to reduce the surface electric field at the edges of devices, and so to maximise the breakdown voltage. The paper provides a review of these techniques. A comparison between the various approaches is then performed with consideration for device type (thyristors, field-effect transistors, transistors etc.) and device die size. This comparison is intended to serve as a guide to choosing the device termination appropriate for each application.

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IEE Proceedings I - Solid-State and Electron Devices  (Volume:129 ,  Issue: 5 )