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This paper describes a 2.4 GHz single-ended switched gain low noise amplifier (SG-LNA) in a 0.35 mum SiGe BiCMOS process. In the design, specific architecture decisions were made in consideration of system-on-chip implementation. The architecture profits from a two cascode stage topology with a shunt resistive feedback in the first cascade-topology stage. The SG-LNA achieved a maximum small signal gain of 34.3 dB within input 1-dB compression point (ICP1dB) of -22 dBm in high-gain mode (HGM), a gain of 25.4 dB within ICP1dB of -13.8 dBm in medium-gain mode (MGM) , and a minimum gain of 18.3 dB within ICP1dB of -6.8 dBm in low-gain mode (LGM). The noise figures (NF) are 2.9 dB, 5.5 dB and 5.9 dB in HGM, MGM and LGM, respectively. Because of using a Common-Gate topology as an active input matching, the SG-LNA presented a good input and output return losses in all modes. All biases applied are active. The SG-LNA consumes a maximum DC current of 42 mA from a 3.3 volt DC supply.