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A new low-leakage-inductance low-resistance design approach to low-voltage high-power isolated boost converters is presented. Very low levels of parasitic circuit inductances are achieved by optimizing transformer design and circuit lay-out. Primary side voltage clamp circuits can be eliminated by the use of power MOSFETs fully rated for repetitive avalanche. Voltage rating of primary switches can now be reduced, significantly reducing switch on-state losses. Finally, silicon carbide rectifying diodes allow fast diode turn-off, further reducing losses. Test results from a 1.5 kW full-bridge boost converter verify theoretical analysis and demonstrate very high efficiency. Worst case efficiency, at minimum input voltage maximum power, is 96.8 percent and maximum efficiency reaches 98 percent.
Date of Conference: 1-3 Sept. 2008