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A new Block-XOR precomputation-based CAM design for low-power embedded system

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4 Author(s)
Chi- Yu Wu ; Dept. of Electron. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei ; Shanq-Jang Ruan ; Chung-Kai Cheng ; Ming-Bo Lin

In this paper, we propose a new precomputation-based content addressable memory (PB-CAM) structure for saving content addressable memory access power. Our approach is based on the PB-CAM. Although the PB-CAM can eliminate the comparison operations to reduce power consumption by precomputation, it suffers from that the ones count approach limits the reduction amount of comparison operations. Therefore, we devise a block-XOR approach to improve the efficiency of PB-CAM. In the experiment, we estimate the power by Synopsys Prime-Power. Compared to, the experimental results show that our approach achieves 89% reduction of the power-delay product in parameter extractor. In addition, it results in 21 % reduction in total cache power consumption.

Published in:

Electronics, Circuits and Systems, 2005. ICECS 2005. 12th IEEE International Conference on

Date of Conference:

11-14 Dec. 2005