By Topic

A Comparative Study of Dopant-Segregated Schottky and Raised Source/Drain Double-Gate MOSFETs

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Reinaldo A. Vega ; Dept. of Eng. Electr. & Comput. Sci., Univ. of California at Berkeley, Berkeley, CA ; Tsu-Jae King Liu

The performance of symmetric double-gate MOSFETs with dopant-segregated Schottky (DSS) source/drain (S/D) regions is investigated through a TCAD modeling study and compared to the performance of raised S/D (RSD) MOSFETs. It is shown that, while the doped extension region adjacent to the S/D Schottky barrier (SB) improves drive current by shrinking the SB, it is fundamentally limited by its dual role as a heavily doped S/D contact region to improve drive current and as a more lightly doped S/D extension region to reduce BTBT leakage. This restricts the design space for meeting low-standby-power leakage specifications, and so, the RSD structure ends up prevailing both in terms of leakage design space and on-state performance. For high-performance (HP) design, where the higher leakage specification permits heavier extension doping, the performances of optimized DSS and RSD MOSFETs are shown to be very similar. Thus, the optimal S/D design for HP is more likely to be decided by practical considerations such as process integration.

Published in:

IEEE Transactions on Electron Devices  (Volume:55 ,  Issue: 10 )