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An FPGA-based high-speed, low-latency trigger processor for high-energy physics

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4 Author(s)
de Cuveland, J. ; Kirchhoff-Inst. for Phys., Univ. of Heidelberg, Heidelberg ; Rettig, F. ; Angelov, V. ; Lindenstruth, V.

An example of an FPGA based application for a high-energy physics experiment is presented which features all facets of modern FPGA design. The special requirements here are high bandwidth (2.16 Tbit/s), low latency, and flexibility in the processing algorithm. The input data come optically via 1 080 links operating at 2.5 Gbit/s. The whole system is partitioned hierarchically in 18 groups of 5+1 modules and one top module. All modules contain the same PCB, FPGA, DDR SRAM and SDRAM, but are equipped with different optional components and additional interface boards, which simplifies the hardware development significantly and reduces the production costs. Embedded PowerPC processors running Linux systems are used to implement a control and monitoring system. The system was installed in the real environment in December 2007 and is in continuous operation for cosmic data taking.

Published in:

Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on

Date of Conference:

8-10 Sept. 2008