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Demonstration of Schottky Barrier NMOS Transistors With Erbium Silicided Source/Drain and Silicon Nanowire Channel

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9 Author(s)
Eu Jin Tan ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore ; Kin-Leong Pey ; Navab Singh ; Guo-Qiang Lo
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We have fabricated silicon nanowire N-MOSFETs using erbium disilicide (ErSi2-x) in a Schottky source/drain back-gated architecture. Although the subthreshold swing (~180 mV/dec) and drain-induced barrier lowering (~500 mV/V) are high due thick BOX as gate oxide, the fabricated Schottky transistors show acceptable drive current ~900 muA/mum and high Ion/Ioff ratio (~105). This is attributed to the improved carrier injection as a result of low Schottky barrier height (Phib) of ErSi2-x/n - Si(~0.3 eV) and the nanometer-sized (~8 nm) Schottky junction. The carrier transport is found to be dominated by the metal-semiconductor interface instead of the channel body speculated from the channel length independent behavior of the devices. Furthermore, the transistors exhibit ambipolar characteristics, which are modeled using thermionic/thermionic-field emission for positive and thermionic-field emission for negative gate biases.

Published in:

IEEE Electron Device Letters  (Volume:29 ,  Issue: 10 )